Many Intel Core architecture, development continues

At the last day of its Intel Developer Forum 2011 has provided some information on their Core architecture Many, better known by the acronym MIC (Many Integrated Core) . We recall how one of the best known embodiments of this architecture has been Larrabee, Intel's project to develop a GPU declined after coprocessor can handle x86 code.

The MIC approach sees the use of architectures that integrate an internal high number of cores, initially all equal to each other and operated in parallel, connected by a high-bandwidth internal communications. Each core is small in size and able to operate with very low fuel consumption, while maintaining compatibility with x 86 codes on paper and then requiring the developer to adapt your code processing on the GPU as is the case with competitive offerings from NVIDIA and AMD.

The next generation of solutions Knights Corner will be developed using 22-nanometer production technology, the same that we will see the debut with opposite Ivy Bridge, integrating within itself more than 50 cores. Intel did not provide specific guidance on what will be greater than 50 the number of cores, but it is clear that the use of a more sophisticated production technology will incorporate a number of parallel cores Semra higher.

Intel has also specified as the future evolution of the architecture MIC pass through the core types of coaching different from each other, and not all the same. This approach will allow for a better use of computing power available to the chip as a whole, adapting the core depending on the type of code that will run these.

For many years, Intel's architecture promotes the MIC which way to speed up processing of the future, but until now this has not led to real products available on the market. The failure of the Larrabee strategy for the consumer segment partly explains the delay, that Intel intends to fill in the future thanks to next-generation solutions Knights Corner.

It 'also important to highlight this issue as the IDF has been very subdued for information related to the future architecture for server systems. In particular information on the expected CPU Xeon E5, proposals for systems up to 2 sockets designed to take the place of the Xeon 5600 models currently on the market. It 'possible that at this point the debut of these processors will not happen in the autumn as originally planned but will be moved to early 2012.


Posted by: Wasim Javed